NVIDIA and MediaTek Deepen AI Pact with $3.5B NVLink Fusion Deal

On August 31, 2026, NVIDIA and MediaTek announced a major expansion of their longstanding collaboration, anchored by a $3.5 billion convertible bond investment from NVIDIA into the Taiwanese chip designer. The deal positions MediaTek as a central design partner within NVIDIA's NVLink Fusion ecosystem, enabling hyperscalers and frontier model developers to build custom AI accelerators that plug directly into NVIDIA's rack-scale AI factories.

A $3.5 Billion Strategic Bet

NVIDIA's investment covers convertible bonds from MediaTek's $3.9 billion overseas offering, making NVIDIA the single largest subscriber. Alphabet has also joined the offering, though its investment size remains undisclosed. The move follows NVIDIA's earlier $2 billion investment in Marvell under the same NVLink Fusion strategy, signaling a systematic pattern: NVIDIA is deploying capital to lock in key silicon design partners across the custom AI chip value chain.

Jensen Huang, NVIDIA's CEO, framed the partnership in expansive terms: "AI is transforming every computing platform — from the world's largest AI factories to the PC and the car. MediaTek is one of the world's great semiconductor companies, with exceptional expertise in system-on-chip design, connectivity, leading performance and power efficiency."

Rick Tsai, MediaTek's vice chairman and CEO, emphasized a shared vision for making advanced AI computing pervasive across the technology landscape.

Three Pillars of Collaboration

The expanded partnership spans three domains:

AI Infrastructure. MediaTek will adopt the NVIDIA NVLink Fusion platform, providing hyperscalers, cloud service providers, and frontier model developers with a prevalidated path to develop custom XPUs — specialized AI accelerators — and integrate them into NVIDIA NVLink-connected, rack-scale AI factories. Rather than engineering every element surrounding a custom XPU from scratch, customers can focus resources on differentiated compute while relying on NVIDIA and MediaTek for connectivity, memory architecture, packaging, manufacturing, and rack-scale technologies.

Local AI Computing. The companies will continue collaborating on multiple generations of RTX Spark and DGX Spark PC chips, which integrate NVIDIA GPUs with MediaTek SoCs to power consumer PCs, AI developer supercomputers, and enterprise workstations. This builds on their prior work on the GB10 Grace Blackwell Superchip that powers NVIDIA's DGX Spark platform.

Automotive. MediaTek's Dimensity Auto platforms will continue integrating NVIDIA technologies, combining MediaTek's automotive SoC design expertise with NVIDIA's DRIVE AGX hardware and software stack for software-defined vehicles.

NVLink Fusion: Opening the Ecosystem

NVLink Fusion, first unveiled at Computex 2025, is the connective technology and IP that enables third-party silicon to join NVIDIA's computing fabric. It offers two integration paths: partners can either embed NVLink interface IP directly into their chip design, or place an NVIDIA-built NVLink chiplet alongside their silicon in the same package. Either way, the resulting component speaks NVLink to NVIDIA hardware across the rack.

The sixth-generation NVLink supports a 72-XPU domain today, with end-to-end latency three times lower and packet rates ten times higher than comparable Ethernet alternatives. The roadmap extends to domains of up to 1,152 accelerators with co-packaged optics. This performance gap matters because large model training and high-throughput inference move enormous volumes of data between chips — standard PCIe connections become bottlenecks at scale.

The platform leverages NVIDIA's MGX rack-scale architecture, which provides proven cooling, power delivery, and supply chain infrastructure. Partners inherit these production-ready systems rather than designing them from scratch, decoupling their custom chip timelines from NVIDIA's full-stack release cadence.

NVHBM: Memory Innovation for Custom XPUs

NVIDIA has also expanded NVLink Fusion with NVHBM, a custom high-bandwidth memory technology that addresses a critical bottleneck in AI accelerator design. Traditional HBM architectures place the memory controller on the XPU die, consuming valuable silicon area. NVHBM relocates the memory controller into the 3D HBM base die itself, co-developed with leading memory vendors.

The results are substantial: up to 30% greater memory bandwidth, 15% lower HBM power consumption, and 25% more compute die area freed on the XPU compared with standard HBM4E. PHY and support area is reduced by up to 67%. At data-center scale, these gains compound — the power savings alone could free headroom for thousands of additional XPUs in a gigawatt-class facility.

Amazon's Annapurna Labs is the first confirmed NVHBM partner, with integration planned starting with Trainium4. This signals a broader industry shift: custom silicon and NVIDIA hardware are increasingly complementary rather than mutually exclusive.

Strategic Implications

The deal carries significance beyond the immediate financial terms. For MediaTek, it accelerates a strategic push beyond smartphones into higher-value AI infrastructure markets, backed by NVIDIA's ecosystem and capital. For NVIDIA, it secures a major design partner across cloud, client, and automotive segments while keeping its architecture at the center of the custom AI chip movement — even as hyperscalers increasingly build their own accelerators.

The broader NVLink Fusion partner ecosystem now includes MediaTek, Marvell, Alchip Technologies, Astera Labs, Synopsys, Cadence, Fujitsu, Qualcomm, Intel, and AWS's Annapurna Labs. This represents a calculated opening of NVIDIA's walled garden: rather than resisting the custom silicon trend, NVIDIA is positioning itself as the connective tissue that binds diverse accelerators into a unified, rack-scale architecture.

Original Insight. NVIDIA's strategy here is structurally analogous to how ARM monetized its architecture — not by competing with every chip designer, but by becoming the indispensable interconnect and IP layer beneath them. By investing in partners like MediaTek and Marvell while simultaneously opening NVLink and NVHBM as licensed technologies, NVIDIA is hedging against the risk that hyperscalers fully bypass its GPUs. Even if a cloud provider's custom XPU becomes the primary compute engine, NVIDIA still captures value through interconnect IP, memory technology, rack-scale systems, and networking. The $3.5 billion is not merely a partnership investment — it is an ecosystem insurance premium, ensuring that NVIDIA's architecture remains the gravitational center of AI infrastructure regardless of who manufactures the compute dies.